URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [rtl/] [busmaster.v] - Rev 39

Rev	Log message	Author	Age	Path
36	Lots of changes, see the git changelog for details.	dgisselq	2934d 10h	/openarty/trunk/rtl/busmaster.v
34	These updates bring the distribution along to the point where both the GPS clock subsecond tracking, as well as the OLEDrgb controller now work.	dgisselq	2937d 23h	/openarty/trunk/rtl/busmaster.v
33	Fixed the network receive CRC and MAC checking, and added ip-checking and minimum packet length checking to the receiver.	dgisselq	2943d 05h	/openarty/trunk/rtl/busmaster.v
32	Brought the CPU to its first working version, to include demo.	dgisselq	2944d 08h	/openarty/trunk/rtl/busmaster.v
30	Network transmit and MIG memory both work now, though the clock speed has been dropped to 80.125MHz.	dgisselq	2945d 01h	/openarty/trunk/rtl/busmaster.v
27	Bus changes ...	dgisselq	2972d 22h	/openarty/trunk/rtl/busmaster.v
25	The memory now works. However, the core speed has been lowered to 81.25MHz to do this. The top level file is no longer fasttop.v, but toplevel.v.	dgisselq	2981d 06h	/openarty/trunk/rtl/busmaster.v
3	Initial set of files. The flash appears to work, memory hasn't been started, the MDIO controller works in simulation, etc. Everything below fasttop.v works at 200MHz (not the CPU---yet).	dgisselq	3028d 08h	/openarty/trunk/rtl/busmaster.v