URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [rtl/] [eqspiflash.v] - Rev 53

Rev	Log message	Author	Age	Path
44	Fixed the flash so that it now runs in 1) high speed (41MHz), and 2) that it doesn't struggle to do read bursts. This should greatly speed up access time.	dgisselq	2977d 08h	/openarty/trunk/rtl/eqspiflash.v
20	Lots of bug fixes: After turning on XIP, and running in XIP mode, leaving XIP mode turns it back off again, necessitating a new write to the VCon register. Further, XIP mode starts in extended SPI mode, and only transfers in QSPI mode for data. Finally, two new commands have been created: enabling the SPI memory reset, and actually resetting the SPI memory. In general, these are all better--as the EQSPI flash controller now works with these changes, whereby it didn't really work without them before.	dgisselq	3059d 09h	/openarty/trunk/rtl/eqspiflash.v
13	Here are the updates necessary to get the initial Quad SPI flash driver working. This includes in particular the bus interconnect (in fastmaster.v), and the final hookup to the external wires (in fasttop.v).	dgisselq	3061d 10h	/openarty/trunk/rtl/eqspiflash.v
12	A work in progress. This checkin contains fixes for the flash (mostly), together with some logic reductions facilitating full speed (200MHz) build.	dgisselq	3062d 12h	/openarty/trunk/rtl/eqspiflash.v
3	Initial set of files. The flash appears to work, memory hasn't been started, the MDIO controller works in simulation, etc. Everything below fasttop.v works at 200MHz (not the CPU---yet).	dgisselq	3077d 16h	/openarty/trunk/rtl/eqspiflash.v