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[/] [openarty/] [trunk/] [rtl/] [lleqspi.v] - Rev 51

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30 Network transmit and MIG memory both work now, though the clock speed has
been dropped to 80.125MHz.
dgisselq 3004d 12h /openarty/trunk/rtl/lleqspi.v
13 Here are the updates necessary to get the initial Quad SPI flash driver working.
This includes in particular the bus interconnect (in fastmaster.v), and the
final hookup to the external wires (in fasttop.v).
dgisselq 3071d 13h /openarty/trunk/rtl/lleqspi.v
12 A work in progress. This checkin contains fixes for the flash (mostly),
together with some logic reductions facilitating full speed (200MHz) build.
dgisselq 3072d 16h /openarty/trunk/rtl/lleqspi.v
3 Initial set of files. The flash appears to work, memory hasn't been started,
the MDIO controller works in simulation, etc. Everything below fasttop.v works
at 200MHz (not the CPU---yet).
dgisselq 3087d 19h /openarty/trunk/rtl/lleqspi.v

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