URL https://opencores.org/ocsvn/openarty/openarty/trunk

Subversion Repositories openarty

[/] [openarty/] [trunk/] [sw/] [host/] [regdefs.h] - Rev 35

Rev	Log message	Author	Age	Path
33	Fixed the network receive CRC and MAC checking, and added ip-checking and minimum packet length checking to the receiver.	dgisselq	2943d 01h	/openarty/trunk/sw/host/regdefs.h
30	Network transmit and MIG memory both work now, though the clock speed has been dropped to 80.125MHz.	dgisselq	2944d 21h	/openarty/trunk/sw/host/regdefs.h
18	The device can now program and configure itself, allowing bootstrap possibilities. `	dgisselq	3009d 21h	/openarty/trunk/sw/host/regdefs.h
14	All changes made as a part of getting the flash driver up and running. Today, it successfully programmed a configuration into the Arty via wbprogram, so ... that's been my last/best test.	dgisselq	3011d 22h	/openarty/trunk/sw/host/regdefs.h
6	Minor updates, mostly to support the development of the DDR3 SDRAM--such as creating addresses for the debugging scope used to figure out what's going on with it.	dgisselq	3013d 01h	/openarty/trunk/sw/host/regdefs.h
4	Initial host software pack.	dgisselq	3028d 04h	/openarty/trunk/sw/host/regdefs.h