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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [dbg_i2c_onoff.v] - Rev 180

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180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4268d 21h /openmsp430/trunk/core/sim/rtl_sim/src/dbg_i2c_onoff.v
154 The serial debug interface now supports the I2C protocol (in addition to the UART) olivier.girard 4401d 22h /openmsp430/trunk/core/sim/rtl_sim/src/dbg_i2c_onoff.v

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