OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [sing-op_push.v] - Rev 145

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
olivier.girard 5082d 02h /openmsp430/trunk/core/sim/rtl_sim/src/sing-op_push.v
102 Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ).
The following PUSH instructions are now working as expected:

- indexed mode: PUSH x(R1)
- indirect register mode: PUSH @R1
- indirect autoincrement: PUSH @R1+
olivier.girard 5159d 01h /openmsp430/trunk/core/sim/rtl_sim/src/sing-op_push.v
19 added SVN property for keywords olivier.girard 5736d 01h /openmsp430/trunk/core/sim/rtl_sim/src/sing-op_push.v
18 Updated headers with SVN info olivier.girard 5736d 01h /openmsp430/trunk/core/sim/rtl_sim/src/sing-op_push.v
2 Upload complete openMSP430 project to the SVN repository olivier.girard 5771d 01h /openmsp430/trunk/core/sim/rtl_sim/src/sing-op_push.v

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.