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[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src/] [tA_capture.v] - Rev 200

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180 Add new ASIC_CLOCKING configuration option to allow ASIC implementations with FPGA clocking scheme.
Thanks to Sebastien Van Cauwenberghe's contribution :-)
olivier.girard 4269d 08h /openmsp430/trunk/core/sim/rtl_sim/src/tA_capture.v
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4609d 09h /openmsp430/trunk/core/sim/rtl_sim/src/tA_capture.v
19 added SVN property for keywords olivier.girard 5570d 08h /openmsp430/trunk/core/sim/rtl_sim/src/tA_capture.v
18 Updated headers with SVN info olivier.girard 5570d 08h /openmsp430/trunk/core/sim/rtl_sim/src/tA_capture.v
2 Upload complete openMSP430 project to the SVN repository olivier.girard 5605d 08h /openmsp430/trunk/core/sim/rtl_sim/src/tA_capture.v

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