OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [sim/] [rtl_sim/] [src-c/] [sandbox/] [makefile] - Rev 155

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
141 Update verification environment to support MSPGCC Uniarch (based on GCC 4.5 and later) olivier.girard 4566d 08h /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
134 Add full ASIC support (low-power modes, DFT, ...).
Improved serial debug interface reliability.
olivier.girard 4610d 09h /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.
olivier.girard 4917d 09h /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile
76 Add possibility to simulate C code within the "core" environment. olivier.girard 5100d 08h /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.