URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [core/] [synthesis/] [synopsys/] [constraints.tcl] - Rev 213

Rev	Log message	Author	Age	Path
134	Add full ASIC support (low-power modes, DFT, ...). Improved serial debug interface reliability.	olivier.girard	4619d 09h	/openmsp430/trunk/core/synthesis/synopsys/constraints.tcl
111	Re-organized the "openMSP430_defines.v" file. Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning). Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000). As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.	olivier.girard	4926d 09h	/openmsp430/trunk/core/synthesis/synopsys/constraints.tcl
56	Update Design Compiler Synthesis scripts.	olivier.girard	5403d 14h	/openmsp430/trunk/core/synthesis/synopsys/constraints.tcl
2	Upload complete openMSP430 project to the SVN repository	olivier.girard	5615d 08h	/openmsp430/trunk/core/synthesis/synopsys/constraints.tcl