URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] [verilog/] [msp_debug.v] - Rev 107

Rev	Log message	Author	Age	Path
104	Update all FPGA example projects with the latest RTL version.	olivier.girard	5016d 12h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/msp_debug.v
94	Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators: - Icarus Verilog - Cver - Verilog-XL - NCVerilog - Modelsim	olivier.girard	5026d 12h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/msp_debug.v
80	Create initial version of the Actel FPGA implementation example.	olivier.girard	5107d 19h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/msp_debug.v