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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] [verilog/] [msp_debug.v] - Rev 107

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104 Update all FPGA example projects with the latest RTL version. olivier.girard 4999d 06h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/msp_debug.v
94 Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators:
- Icarus Verilog
- Cver
- Verilog-XL
- NCVerilog
- Modelsim
olivier.girard 5009d 06h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/msp_debug.v
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5090d 13h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/msp_debug.v

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