URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [bench/] [verilog/] [tb_openMSP430_fpga.v] - Rev 99

Rev	Log message	Author	Age	Path
98	Added support for VCS verilog simulator. VPD and TRN waveforms can now be generated.	olivier.girard	5019d 16h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/tb_openMSP430_fpga.v
94	Thanks to Mihai-Costin Manolescu's contribution, the simulation scripts now support the following simulators: - Icarus Verilog - Cver - Verilog-XL - NCVerilog - Modelsim	olivier.girard	5023d 16h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/tb_openMSP430_fpga.v
80	Create initial version of the Actel FPGA implementation example.	olivier.girard	5104d 23h	/openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/bench/verilog/tb_openMSP430_fpga.v