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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [rtl/] [verilog/] [openmsp430/] [openMSP430.v] - Rev 86

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86 Update serial debug interface test patterns to make them work with all program memory configurations. olivier.girard 5050d 10h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/openMSP430.v
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5104d 19h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/rtl/verilog/openmsp430/openMSP430.v

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