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[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Rev 163

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151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4518d 06h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4608d 17h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
136 Update all FPGA projects with the latest core version. olivier.girard 4640d 07h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.
olivier.girard 5028d 08h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5113d 15h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim

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