OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [actel_m1a3pl_dev_kit/] [sim/] [rtl_sim/] [bin/] [msp430sim] - Rev 211

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
151 Add possibility to configure custom Program, Data and Peripheral memory sizes. olivier.girard 4524d 18h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
138 Update simulation scripts to support Cygwin out of the box for Windows users. olivier.girard 4615d 06h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
136 Update all FPGA projects with the latest core version. olivier.girard 4646d 20h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
98 Added support for VCS verilog simulator.
VPD and TRN waveforms can now be generated.
olivier.girard 5034d 21h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim
80 Create initial version of the Actel FPGA implementation example. olivier.girard 5120d 04h /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.