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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [bench/] [verilog/] [ram_sp.v] - Rev 222

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167 Update LX9 Microboard FPGA example.
It now includes a dual-core oMSP system with a shared 16kB program memory.
Each core has its own 2kB data memory and an additional 2kB shared data memory.
olivier.girard 4385d 08h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/bench/verilog/ram_sp.v

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