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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [bench/] [verilog/] [tb_openMSP430_fpga.v] - Rev 222

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167 Update LX9 Microboard FPGA example.
It now includes a dual-core oMSP system with a shared 16kB program memory.
Each core has its own 2kB data memory and an additional 2kB shared data memory.
olivier.girard 4385d 13h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/bench/verilog/tb_openMSP430_fpga.v
162 Add some more SVN ignore patterns.
Update testbench.
olivier.girard 4437d 12h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/bench/verilog/tb_openMSP430_fpga.v
157 Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come).... olivier.girard 4437d 12h /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/bench/verilog/tb_openMSP430_fpga.v

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