URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_avnet_lx9microbard/] [rtl/] [verilog/] [coregen/] [coregen.cgc] - Rev 213

Rev	Log message	Author	Age	Path
167	Update LX9 Microboard FPGA example. It now includes a dual-core oMSP system with a shared 16kB program memory. Each core has its own 2kB data memory and an additional 2kB shared data memory.	olivier.girard	4362d 12h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/coregen.cgc
157	Re-create new LX9 Microboard project to show off the new I2C serial debug interface (and more to come)....	olivier.girard	4414d 11h	/openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/coregen/coregen.cgc