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[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [rtl/] [verilog/] [omsp_uart.v] - Rev 205

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202 Add DMA interface support + LINT cleanup olivier.girard 3434d 20h /openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/omsp_uart.v
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 3952d 20h /openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/omsp_uart.v
136 Update all FPGA projects with the latest core version. olivier.girard 4630d 20h /openmsp430/trunk/fpga/xilinx_diligent_s3board/rtl/verilog/omsp_uart.v

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