URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] [trunk/] [fpga/] [xilinx_diligent_s3board/] [software/] [leds/] [makefile] - Rev 128

Rev	Log message	Author	Age	Path
106	Separated the Timer A defines from the openMSP430 ones. Added the "dbg_en" port in order to allow a separate reset of the debug interface. Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped). Renamed "per_wen" to "per_we" to prevent confusion with active low signals. Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution).	olivier.girard	4973d 00h	/openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/makefile
71	Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier.	olivier.girard	5356d 01h	/openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/makefile
28	renamed "diligent_s3board" directory to "xilinx_diligent_s3board"	olivier.girard	5434d 09h	/openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/makefile
2	Upload complete openMSP430 project to the SVN repository	olivier.girard	5606d 00h	/openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/makefile