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[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.0rc3/] [cpu/] [or1k/] [spr-defs.h] - Rev 757

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509 Tagging the 0.5.0rc3 release of Or1ksim jeremybennett 4853d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 4919d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 4946d 17h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
432 Updates to handle interrupts correctly. jeremybennett 4987d 12h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
239 or1ksim fixed SPR_VR_RESV value julius 5098d 14h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
233 New softfloat FPU and testfloat sw for or1ksim julius 5102d 04h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5105d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5105d 16h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5206d 09h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5536d 18h /openrisc/tags/or1ksim/or1ksim-0.5.0rc3/cpu/or1k/spr-defs.h

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