URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [tags/] [or1ksim/] [or1ksim-0.5.1rc1/] [pic/] [pic.c] - Rev 535

Rev	Log message	Author	Age	Path
511	Tagging the 0.5.1rc1 release of Or1ksim	jeremybennett	4850d 02h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
440	Updated documentation to describe new Ethernet usage.	jeremybennett	4970d 17h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
436	Or1ksim ethernet TAP updates. Ethernet test still failing.	julius	4979d 12h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
432	Updates to handle interrupts correctly.	jeremybennett	4983d 21h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	4986d 18h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5102d 02h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
220	Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this.	jeremybennett	5108d 18h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5533d 04h	/openrisc/tags/or1ksim/or1ksim-0.5.1rc1/pic/pic.c