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URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [reset.S] - Rev 577

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Rev Log message Author Age Path
467 ORPmon - bug fixes and clean up. julius 5077d 01h /openrisc/trunk/bootloaders/orpmon/reset.S
463 ORPmon update julius 5078d 01h /openrisc/trunk/bootloaders/orpmon/reset.S
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.		 julius 5135d 01h /openrisc/trunk/bootloaders/orpmon/reset.S
406 ORPmon indented files, bus, align and instruction errors vectors printf and reboot julius 5143d 15h /openrisc/trunk/bootloaders/orpmon/reset.S
375 ORPmon update for compatibility with OR toolchain 1.0rc1 julius 5182d 21h /openrisc/trunk/bootloaders/orpmon/reset.S
355 Adding CoreMark to ORPmon, updated Dhrystone test output julius 5197d 21h /openrisc/trunk/bootloaders/orpmon/reset.S
353 OR1200 RTL and ORPSoCv2 update, fixing Verilator build capability.
* or1200/rtl/verilog/or1200_sprs.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_sprs.v: ""
* or1200/rtl/verilog/or1200_ctrl.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_ctrl.v: ""
* or1200/rtl/verilog/or1200_except.v: Verilator public and access comments
* orpsocv2/rtl/verilog/components/or1200/or1200_except.v: ""
* orpsocv2/rtl/verilog/components/wb_ram_b3/wb_ram_b3.v: Some
Verilator related Lint issues fixed.

ORPSoCv2: Removed bus arbiter snooping functions from OrpsocAccess and
updated RAM model hooks for new RAM.
* orpsocv2/bench/sysc/include/Or1200MonitorSC.h: Remove arbiter snooping
* orpsocv2/bench/sysc/src/Or1200MonitorSC.cpp: ""
* orpsocv2/bench/sysc/include/OrpsocAccess.h: Remove arbiter snooping,
change include and classes for new RAM model.
* orpsocv2/bench/sysc/src/OrpsocAccess.cpp: ""

or_debug_proxy - fixing sleep and Windows make issues:
* or_debug_proxy/src/gdb.c: Removed all sleep - still to be fixed properly
* or_debug_proxy/Makefile: Remove VPI file when building on Cygwin (deprecated)

ORPmon play around, various changes to low level files.		 julius 5198d 21h /openrisc/trunk/bootloaders/orpmon/reset.S
246 ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability julius 5214d 19h /openrisc/trunk/bootloaders/orpmon/reset.S
175 Moved orpmon into bootloaders julius 5264d 22h /openrisc/trunk/bootloaders/orpmon/reset.S
140 Changes to ORPMon, probably broke flash loading, improved TFTP julius 5270d 01h /openrisc/trunk/orpmon/reset.S
2 ME: imported orpmon & or1k_startup files marcus.erlandsson 5704d 03h /openrisc/trunk/orpmon/reset.S

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