OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [sim.cfg] - Rev 660

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
467 ORPmon - bug fixes and clean up. julius 5048d 06h /openrisc/trunk/bootloaders/orpmon/sim.cfg
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.
julius 5106d 06h /openrisc/trunk/bootloaders/orpmon/sim.cfg
246 ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability julius 5186d 00h /openrisc/trunk/bootloaders/orpmon/sim.cfg
175 Moved orpmon into bootloaders julius 5236d 03h /openrisc/trunk/bootloaders/orpmon/sim.cfg
2 ME: imported orpmon & or1k_startup files marcus.erlandsson 5675d 08h /openrisc/trunk/orpmon/sim.cfg

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.