URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [sim.cfg] - Rev 438

Rev	Log message	Author	Age	Path
419	ORPmon: Fixed interrupt routines in reset.S so they are compatible with new GCC port (skip over redzone). Added some defines to easily switch what is done when an error vector is executed. Added ability to print out EPCR when crashing. Changed linker script back to one which doesn't skip over holes in SPI flash memories.	julius	5128d 10h	/openrisc/trunk/bootloaders/orpmon/sim.cfg
246	ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability	julius	5208d 04h	/openrisc/trunk/bootloaders/orpmon/sim.cfg
175	Moved orpmon into bootloaders	julius	5258d 07h	/openrisc/trunk/bootloaders/orpmon/sim.cfg
2	ME: imported orpmon & or1k_startup files	marcus.erlandsson	5697d 13h	/openrisc/trunk/orpmon/sim.cfg