OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [bootloaders/] [orpmon/] [sim.cfg] - Rev 507

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
467 ORPmon - bug fixes and clean up. julius 5108d 04h /openrisc/trunk/bootloaders/orpmon/sim.cfg
419 ORPmon: Fixed interrupt routines in reset.S so they are compatible with new
GCC port (skip over redzone).
Added some defines to easily switch what is done when an error vector
is executed.
Added ability to print out EPCR when crashing.
Changed linker script back to one which doesn't skip over holes in SPI
flash memories.
julius 5166d 04h /openrisc/trunk/bootloaders/orpmon/sim.cfg
246 ORPmon update - compatiable with new GCC, added new spr-defs file, better tboot reliability julius 5245d 22h /openrisc/trunk/bootloaders/orpmon/sim.cfg
175 Moved orpmon into bootloaders julius 5296d 01h /openrisc/trunk/bootloaders/orpmon/sim.cfg
2 ME: imported orpmon & or1k_startup files marcus.erlandsson 5735d 06h /openrisc/trunk/orpmon/sim.cfg

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.