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[/] [openrisc/] [trunk/] [gnu-src/] [gdb-7.1/] [gdb/] [or32-tdep.c] - Rev 299

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252 Changes to use source and line info when DWARF debug data is available. jeremybennett 5190d 04h /openrisc/trunk/gnu-src/gdb-7.1/gdb/or32-tdep.c
249 Corrected handling of double args to dummy calls. Better way of determining frame_id.

* or32-tdep.c (or32_push_dummy_call): Corrected handling of double
args provided in two regs.
(or32_frame_cache): Set frame_id based on SP as it will be, even
it not yet computed.		 jeremybennett 5191d 09h /openrisc/trunk/gnu-src/gdb-7.1/gdb/or32-tdep.c
244 Don't try to skip prologue using SAL info (fails with STABS). Fuller check of prologue. Change register names to rnn from gprnn to match assembler. Add debug option to simulator wrapper.

* or32-tdep.c (or32_register_name): Changed to rnn rather than
gprnn to mach the assembler.
(or32_is_arg_reg, or32_is_callee_saved_reg): Added.
(or32_skip_prologue): Don't use skip_prologue_using_sal. Check for
argument as well as callee saved registers in prologue.
(or32_frame_cache):Check for argument as well as callee saved
registers in prologue.

* wrapper.c: OR32_SIM_DEBUG added to control debug messages.
(sim_close, sim_load, sim_create_inferior, sim_fetch_register)
(sim_stop): Debug statement added.
(sim_read, sim_write): Debug statements now controlled by
OR32_SIM_DEBUG.
(sim_store_register, sim_resume): Debug statement added and
existing debug statements now controlled by OR32_SIM_DEBUG.		 jeremybennett 5196d 06h /openrisc/trunk/gnu-src/gdb-7.1/gdb/or32-tdep.c
227 GDB 7.1 for OpenRISC 1000. Initial checkin. jeremybennett 5215d 21h /openrisc/trunk/gnu-src/gdb-7.1/gdb/or32-tdep.c

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