OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [doc/] [openrisc1200_spec.pdf] - Rev 712

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
647 or1200: update documentation to go with recent rtl commits julius 4801d 11h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
645 or1200: Specification document source now in asciidoc format. ODT and MS Word format documents deprecated, PDF regenerated julius 4819d 10h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
481 OR1200 Update. RTL and spec. julius 5045d 03h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
401 Fixing find first one (ff1) and find last one (fl1) support in OR1200.

Updated documentation, adding missing l.ff1 and l.fl1 opcodes to supported
instructions table.
julius 5123d 16h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.
julius 5173d 12h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5186d 07h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf
10 or1200 added from or1k subversion repository unneback 5648d 22h /openrisc/trunk/or1200/doc/openrisc1200_spec.pdf

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.