URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_defines.v] - Rev 359

Rev	Log message	Author	Age	Path
358	OR1200's reset now configurable as active high or active low. Thanks to patch from OpenCores contributor Kuoping. Updated OR1200 in ORPSoCv2 and OR1200 project.	julius	5179d 16h	/openrisc/trunk/or1200/rtl/verilog/or1200_defines.v
259	Fixing or1200_defines FPU module selection defines - They are no longer needed	julius	5190d 01h	/openrisc/trunk/or1200/rtl/verilog/or1200_defines.v
258	Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off	julius	5190d 01h	/openrisc/trunk/or1200/rtl/verilog/or1200_defines.v
185	Adding single precision FPU to or1200, initial checkin, not fully tested yet	julius	5240d 10h	/openrisc/trunk/or1200/rtl/verilog/or1200_defines.v
141	added OpenRISC version rel3	marcus.erlandsson	5251d 14h	/openrisc/trunk/or1200/rtl/verilog/or1200_defines.v
10	or1200 added from or1k subversion repository	unneback	5652d 17h	/openrisc/trunk/or1200/rtl/verilog/or1200_defines.v