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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_fpu.v] - Rev 358

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358 OR1200's reset now configurable as active high or active low. Thanks to patch
from OpenCores contributor Kuoping.

Updated OR1200 in ORPSoCv2 and OR1200 project.
julius 5034d 03h /openrisc/trunk/or1200/rtl/verilog/or1200_fpu.v
260 Fixed `define in FPU that didnt need to be there julius 5042d 17h /openrisc/trunk/or1200/rtl/verilog/or1200_fpu.v
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5044d 13h /openrisc/trunk/or1200/rtl/verilog/or1200_fpu.v
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5094d 20h /openrisc/trunk/or1200/rtl/verilog/or1200_fpu.v
185 Adding single precision FPU to or1200, initial checkin, not fully tested yet julius 5094d 21h /openrisc/trunk/or1200/rtl/verilog/or1200_fpu.v

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