URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_fpu_pre_norm_addsub.v] - Rev 286

Rev	Log message	Author	Age	Path
258	Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off	julius	5191d 18h	/openrisc/trunk/or1200/rtl/verilog/or1200_fpu_pre_norm_addsub.v