URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_ic_ram.v] - Rev 794

Rev	Log message	Author	Age	Path
481	OR1200 Update. RTL and spec.	julius	5061d 07h	/openrisc/trunk/or1200/rtl/verilog/or1200_ic_ram.v
141	added OpenRISC version rel3	marcus.erlandsson	5263d 22h	/openrisc/trunk/or1200/rtl/verilog/or1200_ic_ram.v
10	or1200 added from or1k subversion repository	unneback	5665d 02h	/openrisc/trunk/or1200/rtl/verilog/or1200_ic_ram.v