URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_mult_mac.v] - Rev 356

Rev	Log message	Author	Age	Path
356	Added new simple MAC test to ORPSoC test suite: * orpsocv2/sw/or1200asm/or1200asm-mac.S: Added Fixed MAC pipeline issue in OR1200 * or1200/rtl/verilog/or1200_mult_mac.v: Made mac_op valid only once per insn. * orpsocv2/rtl/verilog/components/or1200/or1200_mult_mac.v: "" * orpsocv2/sw/dhry/dhry.c: Changed final output to be same as ORPmon version * orpsocv2/sim/bin/Makefile: Added new MAC test to default tests	julius	5206d 22h	/openrisc/trunk/or1200/rtl/verilog/or1200_mult_mac.v
258	Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off	julius	5216d 22h	/openrisc/trunk/or1200/rtl/verilog/or1200_mult_mac.v
141	added OpenRISC version rel3	marcus.erlandsson	5278d 10h	/openrisc/trunk/or1200/rtl/verilog/or1200_mult_mac.v
10	or1200 added from or1k subversion repository	unneback	5679d 14h	/openrisc/trunk/or1200/rtl/verilog/or1200_mult_mac.v