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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_reg2mem.v] - Rev 617

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364 OR1200 passes verilator lint. Mainly fixes to widths, and all case statements
altered to casez and Xs changed to ?s.

OR1200 PIC default width back to 31 (was accidentally changed to ORPSoC's 20
last checkin)

OR1200 spec updated to version 0.9, various updates.

OR1200 in ORPSoC and main OR1200 in sync, only difference is defines.
julius 5179d 01h /openrisc/trunk/or1200/rtl/verilog/or1200_reg2mem.v
141 added OpenRISC version rel3 marcus.erlandsson 5253d 07h /openrisc/trunk/or1200/rtl/verilog/or1200_reg2mem.v
10 or1200 added from or1k subversion repository unneback 5654d 11h /openrisc/trunk/or1200/rtl/verilog/or1200_reg2mem.v

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