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[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_rf.v] - Rev 594

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358 OR1200's reset now configurable as active high or active low. Thanks to patch
from OpenCores contributor Kuoping.

Updated OR1200 in ORPSoCv2 and OR1200 project.
julius 5177d 04h /openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
258 Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off julius 5187d 14h /openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
186 OR1200 RTL FPU fix - RF writeback signal working properly again julius 5237d 21h /openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
141 added OpenRISC version rel3 marcus.erlandsson 5249d 02h /openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
10 or1200 added from or1k subversion repository unneback 5650d 05h /openrisc/trunk/or1200/rtl/verilog/or1200_rf.v

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