URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1200/] [rtl/] [verilog/] [or1200_rf.v] - Rev 617

Rev	Log message	Author	Age	Path
358	OR1200's reset now configurable as active high or active low. Thanks to patch from OpenCores contributor Kuoping. Updated OR1200 in ORPSoCv2 and OR1200 project.	julius	5181d 10h	/openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
258	Big OR1200 update - FPU, data cache write-back added, spec updated, ODT format doc now main one, default config set to both caches 8K, all integer arithmetic, FPU off	julius	5191d 19h	/openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
186	OR1200 RTL FPU fix - RF writeback signal working properly again	julius	5242d 03h	/openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
141	added OpenRISC version rel3	marcus.erlandsson	5253d 07h	/openrisc/trunk/or1200/rtl/verilog/or1200_rf.v
10	or1200 added from or1k subversion repository	unneback	5654d 11h	/openrisc/trunk/or1200/rtl/verilog/or1200_rf.v