Rev |
Log message |
Author |
Age |
Path |
451 |
More tidying up. |
jeremybennett |
5092d 07h |
/openrisc/trunk/or1ksim/ChangeLog |
450 |
Simplified (and hopefully more reliable) Ethernet MAC/PHY. |
jeremybennett |
5092d 10h |
/openrisc/trunk/or1ksim/ChangeLog |
442 |
OR1Ksim - adding trace controlability by SIGUSR1 signal. |
julius |
5098d 05h |
/openrisc/trunk/or1ksim/ChangeLog |
440 |
Updated documentation to describe new Ethernet usage. |
jeremybennett |
5099d 06h |
/openrisc/trunk/or1ksim/ChangeLog |
437 |
Or1ksim - ethernet peripheral update, working much better. |
julius |
5107d 01h |
/openrisc/trunk/or1ksim/ChangeLog |
436 |
Or1ksim ethernet TAP updates. Ethernet test still failing. |
julius |
5108d 01h |
/openrisc/trunk/or1ksim/ChangeLog |
434 |
Work in progress with new Ethernet TUN/TAP interface. |
jeremybennett |
5111d 07h |
/openrisc/trunk/or1ksim/ChangeLog |
432 |
Updates to handle interrupts correctly. |
jeremybennett |
5112d 11h |
/openrisc/trunk/or1ksim/ChangeLog |
430 |
or1ksim - clarifying interrupt behavior in code and documentation. |
julius |
5115d 07h |
/openrisc/trunk/or1ksim/ChangeLog |
429 |
or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions. |
julius |
5115d 11h |
/openrisc/trunk/or1ksim/ChangeLog |
428 |
or1ksim - adding preliminary PHY emulation to ethernet peripheral. |
julius |
5118d 06h |
/openrisc/trunk/or1ksim/ChangeLog |
420 |
New feature to trace instructions (option --trace). Manual updated to match. |
jeremybennett |
5126d 11h |
/openrisc/trunk/or1ksim/ChangeLog |
418 |
Or1ksim - adding new option when configuring memories, "exitnops" |
julius |
5126d 14h |
/openrisc/trunk/or1ksim/ChangeLog |
387 |
Fixed testing, to always use our DEJAGNU config. |
jeremybennett |
5166d 11h |
/openrisc/trunk/or1ksim/ChangeLog |
385 |
Updates for Or1ksim 0.5.0rc2.
* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.
* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected. |
jeremybennett |
5166d 12h |
/openrisc/trunk/or1ksim/ChangeLog |
376 |
Adding handling cases for RSP queries seen from new gdb-7.2 in RSP servers in
or1ksim and or_debug_proxy.
Adding ChangeLog to or_debug_proxy |
julius |
5173d 17h |
/openrisc/trunk/or1ksim/ChangeLog |
346 |
Changes to support Or1ksim 0.5.0rc1
Top level changes:
* config.h.in: Regenerated.
* debug.cfg, rsp.cfg: Deleted.
* doc/or1ksim.texi: Updated for new options and library interface.
* doc/or1ksim.info, doc/version.texi: Regenerated.
* Makefile.am: Added sim.cfg to EXTRA_DIST.
* NEWS: Updated for 0.5.0rc1.
* or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
* sim.cfg: Updated for consistency with the user guide.
* sim-config.c (init_defconfig): 50000 as default VAPI port.
(alloc_memory_block): Verbose message of amount allocated.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.
Changes in testsuite:
* libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
between interrupts to 2ms.
<int-edge simple 2>: Increase time between interrupts to 2ms.
<int-edge duplicated 1>: Increase time between interrupts to 2ms.
<int-edge duplicated 2>: Increase time between interrupts to 2ms.
Changes in testsuite/test-code-or1k:
* mc-common/except-mc.S: Remove leading underscores from global
symbols.
* except/except.S: Remove leading underscores from global symbols.
* cache/cache-asm.S: Remove leading underscores from global symbols.
* cache/cache.c (jump_and_link): Remove leading underscore from
label.
(jump): Remove leading underscore from label.
(all): Remove leading underscore from global symbol references.
* testfloat/systfloat.S: Remove leading underscores from global
symbols.
* mmu/mmu.c (jump): Remove leading underscore from label.
* mmu/mmu-asm.S: Remove leading underscores from global symbols.
* except-test/except-test.c: Remove leading underscores from
global symbols.
* except-test/except-test-s.S: Remove leading underscores from
global symbols.
* uos/except-or32.S: Remove leading underscores from global
symbols.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1. |
jeremybennett |
5191d 14h |
/openrisc/trunk/or1ksim/ChangeLog |
240 |
or1ksim build fixups for Cygwin copilation |
julius |
5221d 17h |
/openrisc/trunk/or1ksim/ChangeLog |
239 |
or1ksim fixed SPR_VR_RESV value |
julius |
5223d 13h |
/openrisc/trunk/or1ksim/ChangeLog |
236 |
Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.
* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions. |
jeremybennett |
5225d 10h |
/openrisc/trunk/or1ksim/ChangeLog |