OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Rev 118

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5272d 06h /openrisc/trunk/or1ksim/ChangeLog
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5274d 09h /openrisc/trunk/or1ksim/ChangeLog
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5275d 09h /openrisc/trunk/or1ksim/ChangeLog
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5275d 10h /openrisc/trunk/or1ksim/ChangeLog
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5276d 09h /openrisc/trunk/or1ksim/ChangeLog
110 or1ksim make check should work without a libc in the or32-elf tools julius 5277d 10h /openrisc/trunk/or1ksim/ChangeLog
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5279d 10h /openrisc/trunk/or1ksim/ChangeLog
104 Candidate release 0.4.0rc4 jeremybennett 5282d 17h /openrisc/trunk/or1ksim/ChangeLog
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5291d 11h /openrisc/trunk/or1ksim/ChangeLog
99 Bug in test evaluation for library fixed. jeremybennett 5296d 11h /openrisc/trunk/or1ksim/ChangeLog
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5297d 12h /openrisc/trunk/or1ksim/ChangeLog
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5311d 18h /openrisc/trunk/or1ksim/ChangeLog
96 Various changes which had not been picked up in earlier commits. jeremybennett 5312d 20h /openrisc/trunk/or1ksim/ChangeLog
93 Additional library tests. Key difference is change to Or1ksim library interface for upcalls to bring closer in to line with SystemC TLM 2.0. jeremybennett 5318d 10h /openrisc/trunk/or1ksim/ChangeLog
88 Fix to bug 1710. jeremybennett 5325d 17h /openrisc/trunk/or1ksim/ChangeLog
86 Bug 1723 fixed (PS2 keyboard error message clarification). jeremybennett 5325d 17h /openrisc/trunk/or1ksim/ChangeLog
85 Bug 1773 (RSP usage with ELF image preloaded) fixed. jeremybennett 5325d 18h /openrisc/trunk/or1ksim/ChangeLog
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5326d 09h /openrisc/trunk/or1ksim/ChangeLog
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5444d 12h /openrisc/trunk/or1ksim/ChangeLog
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5656d 18h /openrisc/trunk/or1ksim/ChangeLog

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.