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[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Rev 248

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240 or1ksim build fixups for Cygwin copilation julius 5252d 16h /openrisc/trunk/or1ksim/ChangeLog
239 or1ksim fixed SPR_VR_RESV value julius 5254d 12h /openrisc/trunk/or1ksim/ChangeLog
236 Terminate execution on NOP_EXIT, even if debugging, add support for RSP qAttached packet, stall in library after single instruction is ST bit is set in SPR DMR1. Fix softfloat to allow compilation with -O0 for debugging.

* configure: Regenerated.
* configure.ac: Version changed to current date. Test for
varargs.h dropped.
* cpu/or32/insnset.c <l_nop>: Terminate execution on NOP_EXIT,
even if debugging.
* debug/rsp-server.c (rsp_query): Added support for qAttached
packet.
* libtoplevel.c (or1ksim_run): Stall after a single instruction if
SPR_DMR1_ST flag is set.
* softfloat/host.h: Make #define of INLINE conditional, to allow
the user to override.
* softfloat/README: Added instructions for non-optimized compilation.
* softfloat/softfloat-macros: Add a conditional #ifndef
NO_SOFTFLOAT_UNUSUED around unused functions.
jeremybennett 5256d 09h /openrisc/trunk/or1ksim/ChangeLog
235 Removed support for old OpenRISC JTAG Remote Protocol. jeremybennett 5256d 14h /openrisc/trunk/or1ksim/ChangeLog
234 Minor tidy ups. DOS end of line chars fixed. jeremybennett 5257d 15h /openrisc/trunk/or1ksim/ChangeLog
233 New softfloat FPU and testfloat sw for or1ksim julius 5258d 02h /openrisc/trunk/or1ksim/ChangeLog
230 Changed library interface. Fixed namespace problems with instruction lookup in library.

* configure: Regenerated.
* configure.ac: Version changed to current date.
* cpu/or1k/opcode/or32.h <or1ksim_build_automata>: Renamed from
build_automata.
<l_none, num_opcodes, insn_index>: Deleted.
<or1ksim_op_start>: Renamed from op_start.
<or1ksim_automata>: Renamed from automata.
<or1ksim_ti>: Renamed from ti.
<or1ksim_or32_opcodes>: Renamed from or32_opcodes.
<or1ksim_disassembled>: Renamed from disassembled.
<or1ksim_insn_len>: Renamed from insn_len.
<or1ksim_insn_name>: Renamed from insn_name.
<or1ksim_destruct_automata>: Renamed from destruct_automata.
<or1ksim_insn_decode>: Renamed from insn_decode.
<or1ksim_disassemble_insn>: Renamed from disassemble_insn.
<or1ksim_disassemble_index>: Renamed from disassemble_index.
<or1ksim_extend_imm>: Renamed from extend_imm.
<or1ksim_or32_extract>: Renamed from or32_extract
* cpu/or32/or32.c, cpu/or32/execute.c, cpu/or32/generate.c,
* cpu/common/stats.c, cpu/common/abstract.c, cpu/common/parse.c,
* cpu/or1k/opcode/or32.h, cuc/load.c, cuc/cuc.c,
* support/dumpverilog.c, toplevel-support.c: Renaming
corresponding to changes in cpu/or1k/opcode/or32.h.
* cpu/or32/execute-fp.h: Deleted
* cpu/or32/generate.c <include_strings>: Remove reference to
execute-fp.h
* cpu/or32/execute.c <host_fp_rm>: Declared static.
(fp_set_flags_restore_host_rm, fp_set_or1k_rm): Declared static,
forward declaration removed.
* or1ksim.h (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
* libtoplevel.c (or1ksim_read_mem, or1ksim_write_mem): addr arg
changed to unsigned long int.
(or1ksim_read_spr): sprval_ptr arg changed to unsigned long int *.
(or1ksim_write_spr): sprval arg changed to unsigned long int.
(or1ksim_read_reg): regval_ptr arg changed to unsigned long int *.
(or1ksim_write_reg): regval arg changed to unsigned long int.
jeremybennett 5259d 07h /openrisc/trunk/or1ksim/ChangeLog
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5261d 07h /openrisc/trunk/or1ksim/ChangeLog
224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5261d 15h /openrisc/trunk/or1ksim/ChangeLog
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5268d 06h /openrisc/trunk/or1ksim/ChangeLog
202 Adding executed log in binary format capability to or1ksim julius 5274d 10h /openrisc/trunk/or1ksim/ChangeLog
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5291d 11h /openrisc/trunk/or1ksim/ChangeLog
134 Updates for stable release 0.4.0 jeremybennett 5299d 15h /openrisc/trunk/or1ksim/ChangeLog
127 New config option to allow l.xori with unsigned operand. jeremybennett 5305d 11h /openrisc/trunk/or1ksim/ChangeLog
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5306d 07h /openrisc/trunk/or1ksim/ChangeLog
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5306d 11h /openrisc/trunk/or1ksim/ChangeLog
122 Added l.ror and l.rori with associated tests. jeremybennett 5307d 07h /openrisc/trunk/or1ksim/ChangeLog
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5307d 08h /openrisc/trunk/or1ksim/ChangeLog
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5308d 04h /openrisc/trunk/or1ksim/ChangeLog
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5310d 08h /openrisc/trunk/or1ksim/ChangeLog

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