OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [ChangeLog] - Rev 500

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
494 Change to ensure handles ctrl-C correctly with empty line. jeremybennett 5022d 13h /openrisc/trunk/or1ksim/ChangeLog
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5045d 22h /openrisc/trunk/or1ksim/ChangeLog
472 Various changes which improve the quality of the tracing. jeremybennett 5064d 23h /openrisc/trunk/or1ksim/ChangeLog
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 5072d 21h /openrisc/trunk/or1ksim/ChangeLog
458 or1ksim testsuite updates julius 5074d 02h /openrisc/trunk/or1ksim/ChangeLog
457 or1ksim - couple of ethernet peripheral updates, fixup of ethernet regression test so all tests pass again. julius 5082d 16h /openrisc/trunk/or1ksim/ChangeLog
451 More tidying up. jeremybennett 5093d 12h /openrisc/trunk/or1ksim/ChangeLog
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 5093d 16h /openrisc/trunk/or1ksim/ChangeLog
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5099d 10h /openrisc/trunk/or1ksim/ChangeLog
440 Updated documentation to describe new Ethernet usage. jeremybennett 5100d 12h /openrisc/trunk/or1ksim/ChangeLog
437 Or1ksim - ethernet peripheral update, working much better. julius 5108d 06h /openrisc/trunk/or1ksim/ChangeLog
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5109d 07h /openrisc/trunk/or1ksim/ChangeLog
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5112d 13h /openrisc/trunk/or1ksim/ChangeLog
432 Updates to handle interrupts correctly. jeremybennett 5113d 16h /openrisc/trunk/or1ksim/ChangeLog
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5116d 13h /openrisc/trunk/or1ksim/ChangeLog
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.		 julius 5116d 16h /openrisc/trunk/or1ksim/ChangeLog
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5119d 12h /openrisc/trunk/or1ksim/ChangeLog
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 5127d 17h /openrisc/trunk/or1ksim/ChangeLog
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5127d 20h /openrisc/trunk/or1ksim/ChangeLog
387 Fixed testing, to always use our DEJAGNU config. jeremybennett 5167d 16h /openrisc/trunk/or1ksim/ChangeLog

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.