| 385 |
Updates for Or1ksim 0.5.0rc2.
* configure: Regenerated.
* configure.ac: Minor tidy ups. Version changed to 0.5.0rc2.
* debug/rsp-server.c (rsp_query): Simplified handling of
"qTStatus" to indicate we just do not support tracing.
* doc/or1ksim.texi <Configuring the Build>: No longer mandatory to
specify the target.
<Memory Configuration>: Warns about issues with memory controller.
<Memory Controller Configuration>: Warns about issues with memory
controller and advises not to use it.
<Standalone Simulator>: Details for options with arguments updated.
* NEWS: Updated for 0.5.0rc2.
* peripheral/mc.c (mc_poc): Use constant MC_POC_VALID
(mc_index): Ensure value is valid.
* peripheral/mc-defines.h <MC_CE_VALID>: Defined.
* testsuite/test-code-or1k/configure: Regenerated.
* testsuite/test-code-or1k/configure.ac: Handle the case where
target_cpu is not set. Version changed to 0.5.0rc2.
* testsuite/test-code-or1k/support/spr-defs.h <SPR_VR_RES>:
Definition corrected. |
jeremybennett |
5294d 07h |
/openrisc/trunk/or1ksim/NEWS |
| 346 |
Changes to support Or1ksim 0.5.0rc1
Top level changes:
* config.h.in: Regenerated.
* debug.cfg, rsp.cfg: Deleted.
* doc/or1ksim.texi: Updated for new options and library interface.
* doc/or1ksim.info, doc/version.texi: Regenerated.
* Makefile.am: Added sim.cfg to EXTRA_DIST.
* NEWS: Updated for 0.5.0rc1.
* or1ksim.h <enum or1ksim_rc>: OR1KSIM_RC_OK explicitly zero.
* sim.cfg: Updated for consistency with the user guide.
* sim-config.c (init_defconfig): 50000 as default VAPI port.
(alloc_memory_block): Verbose message of amount allocated.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1.
Changes in testsuite:
* libsim.tests/int-edge.exp <int-edge simple 1>: Increase time
between interrupts to 2ms.
<int-edge simple 2>: Increase time between interrupts to 2ms.
<int-edge duplicated 1>: Increase time between interrupts to 2ms.
<int-edge duplicated 2>: Increase time between interrupts to 2ms.
Changes in testsuite/test-code-or1k:
* mc-common/except-mc.S: Remove leading underscores from global
symbols.
* except/except.S: Remove leading underscores from global symbols.
* cache/cache-asm.S: Remove leading underscores from global symbols.
* cache/cache.c (jump_and_link): Remove leading underscore from
label.
(jump): Remove leading underscore from label.
(all): Remove leading underscore from global symbol references.
* testfloat/systfloat.S: Remove leading underscores from global
symbols.
* mmu/mmu.c (jump): Remove leading underscore from label.
* mmu/mmu-asm.S: Remove leading underscores from global symbols.
* except-test/except-test.c: Remove leading underscores from
global symbols.
* except-test/except-test-s.S: Remove leading underscores from
global symbols.
* uos/except-or32.S: Remove leading underscores from global
symbols.
* configure: Regenerated.
* configure.ac: Version changed to 0.5.0rc1. |
jeremybennett |
5319d 10h |
/openrisc/trunk/or1ksim/NEWS |
| 224 |
Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. |
jeremybennett |
5358d 11h |
/openrisc/trunk/or1ksim/NEWS |
| 143 |
Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). |
jeremybennett |
5388d 07h |
/openrisc/trunk/or1ksim/NEWS |
| 134 |
Updates for stable release 0.4.0 |
jeremybennett |
5396d 11h |
/openrisc/trunk/or1ksim/NEWS |
| 127 |
New config option to allow l.xori with unsigned operand. |
jeremybennett |
5402d 07h |
/openrisc/trunk/or1ksim/NEWS |
| 124 |
Overflow handling now in line with architecture manual. Tests added. |
jeremybennett |
5403d 03h |
/openrisc/trunk/or1ksim/NEWS |
| 123 |
Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. |
jeremybennett |
5403d 07h |
/openrisc/trunk/or1ksim/NEWS |
| 122 |
Added l.ror and l.rori with associated tests. |
jeremybennett |
5404d 03h |
/openrisc/trunk/or1ksim/NEWS |
| 121 |
Adds exception handling to l.jalr and l.jr. Adds appropriate tests. |
jeremybennett |
5404d 04h |
/openrisc/trunk/or1ksim/NEWS |
| 118 |
New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. |
jeremybennett |
5405d 00h |
/openrisc/trunk/or1ksim/NEWS |
| 116 |
Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. |
jeremybennett |
5407d 04h |
/openrisc/trunk/or1ksim/NEWS |
| 115 |
Added support for l.fl1 and tests for l.ff1 and l.fl1 |
jeremybennett |
5408d 03h |
/openrisc/trunk/or1ksim/NEWS |
| 114 |
l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. |
jeremybennett |
5408d 04h |
/openrisc/trunk/or1ksim/NEWS |
| 107 |
New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. |
jeremybennett |
5412d 04h |
/openrisc/trunk/or1ksim/NEWS |
| 104 |
Candidate release 0.4.0rc4 |
jeremybennett |
5415d 11h |
/openrisc/trunk/or1ksim/NEWS |
| 89 |
Tidy up for latest bug fixes. |
jeremybennett |
5458d 11h |
/openrisc/trunk/or1ksim/NEWS |
| 88 |
Fix to bug 1710. |
jeremybennett |
5458d 11h |
/openrisc/trunk/or1ksim/NEWS |
| 86 |
Bug 1723 fixed (PS2 keyboard error message clarification). |
jeremybennett |
5458d 11h |
/openrisc/trunk/or1ksim/NEWS |
| 85 |
Bug 1773 (RSP usage with ELF image preloaded) fixed. |
jeremybennett |
5458d 12h |
/openrisc/trunk/or1ksim/NEWS |
