OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [autom4te.cache/] [traces.0] - Rev 430

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
428 or1ksim - adding preliminary PHY emulation to ethernet peripheral. julius 5111d 23h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5120d 07h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
233 New softfloat FPU and testfloat sw for or1ksim julius 5220d 19h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
226 Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated julius 5224d 00h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
202 Adding executed log in binary format capability to or1ksim julius 5237d 03h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
60 Mark Jarvin's patches to support Mac OS X (Snow Leopard). jeremybennett 5443d 03h /openrisc/trunk/or1ksim/autom4te.cache/traces.0
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5655d 10h /openrisc/trunk/or1ksim/autom4te.cache/traces.0

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.