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[/] [openrisc/] [trunk/] [or1ksim/] [configure] - Rev 225

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224 Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg. jeremybennett 5234d 07h /openrisc/trunk/or1ksim/configure
220 Updated library interface to take a full command line (this will break all old code). Added -q/--quiet and --report-memory-errors flags to command line. Fixed all tests to match this. jeremybennett 5240d 22h /openrisc/trunk/or1ksim/configure
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5264d 03h /openrisc/trunk/or1ksim/configure
134 Updates for stable release 0.4.0 jeremybennett 5272d 07h /openrisc/trunk/or1ksim/configure
127 New config option to allow l.xori with unsigned operand. jeremybennett 5278d 03h /openrisc/trunk/or1ksim/configure
124 Overflow handling now in line with architecture manual. Tests added. jeremybennett 5278d 23h /openrisc/trunk/or1ksim/configure
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5279d 03h /openrisc/trunk/or1ksim/configure
122 Added l.ror and l.rori with associated tests. jeremybennett 5279d 23h /openrisc/trunk/or1ksim/configure
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5280d 00h /openrisc/trunk/or1ksim/configure
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5280d 20h /openrisc/trunk/or1ksim/configure
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5283d 00h /openrisc/trunk/or1ksim/configure
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5283d 23h /openrisc/trunk/or1ksim/configure
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5284d 23h /openrisc/trunk/or1ksim/configure
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5288d 00h /openrisc/trunk/or1ksim/configure
104 Candidate release 0.4.0rc4 jeremybennett 5291d 07h /openrisc/trunk/or1ksim/configure
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5300d 01h /openrisc/trunk/or1ksim/configure
99 Bug in test evaluation for library fixed. jeremybennett 5305d 01h /openrisc/trunk/or1ksim/configure
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5306d 02h /openrisc/trunk/or1ksim/configure
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5320d 08h /openrisc/trunk/or1ksim/configure
96 Various changes which had not been picked up in earlier commits. jeremybennett 5321d 10h /openrisc/trunk/or1ksim/configure

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