OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [Makefile.in] - Rev 178

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5252d 21h /openrisc/trunk/or1ksim/cpu/Makefile.in
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5253d 18h /openrisc/trunk/or1ksim/cpu/Makefile.in
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5272d 23h /openrisc/trunk/or1ksim/cpu/Makefile.in
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5279d 00h /openrisc/trunk/or1ksim/cpu/Makefile.in
97 Updates to test the new JTAG library interface (not yet complete). jeremybennett 5293d 06h /openrisc/trunk/or1ksim/cpu/Makefile.in
96 Various changes which had not been picked up in earlier commits. jeremybennett 5294d 07h /openrisc/trunk/or1ksim/cpu/Makefile.in
91 Tidy up of some obsolete configuration code. jeremybennett 5306d 21h /openrisc/trunk/or1ksim/cpu/Makefile.in
90 Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain). jeremybennett 5306d 22h /openrisc/trunk/or1ksim/cpu/Makefile.in
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.
jeremybennett 5307d 21h /openrisc/trunk/or1ksim/cpu/Makefile.in
80 Add missing configuration files to SVN. jeremybennett 5308d 01h /openrisc/trunk/or1ksim/cpu/Makefile.in

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.