OpenCores
URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] [abstract.c] - Rev 178

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
101 ChangeLog updated for floating point support. Fixed bug in generic peripheral upcalls. Upped release date in configure.ac. Removed redundant debugging print in abstract.c jeremybennett 5325d 05h /openrisc/trunk/or1ksim/cpu/common/abstract.c
98 Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller. jeremybennett 5331d 06h /openrisc/trunk/or1ksim/cpu/common/abstract.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5690d 12h /openrisc/trunk/or1ksim/cpu/common/abstract.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.