URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [common/] [execute.h] - Rev 482

Rev	Log message	Author	Age	Path
430	or1ksim - clarifying interrupt behavior in code and documentation.	julius	5133d 11h	/openrisc/trunk/or1ksim/cpu/common/execute.h
420	New feature to trace instructions (option --trace). Manual updated to match.	jeremybennett	5144d 15h	/openrisc/trunk/or1ksim/cpu/common/execute.h
202	Adding executed log in binary format capability to or1ksim	julius	5261d 14h	/openrisc/trunk/or1ksim/cpu/common/execute.h
124	Overflow handling now in line with architecture manual. Tests added.	jeremybennett	5293d 11h	/openrisc/trunk/or1ksim/cpu/common/execute.h
112	Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register.	jeremybennett	5299d 11h	/openrisc/trunk/or1ksim/cpu/common/execute.h
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5679d 21h	/openrisc/trunk/or1ksim/cpu/common/execute.h