URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or1k/] [spr-defs.h] - Rev 460

Rev	Log message	Author	Age	Path
460	Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes.	jeremybennett	4943d 23h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
432	Updates to handle interrupts correctly.	jeremybennett	4984d 18h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
239	or1ksim fixed SPR_VR_RESV value	julius	5095d 20h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
233	New softfloat FPU and testfloat sw for or1ksim	julius	5099d 10h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
226	Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated	julius	5102d 15h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5102d 23h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5203d 15h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5534d 01h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h