URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or1k/] [spr-defs.h] - Rev 297

Rev	Log message	Author	Age	Path
239	or1ksim fixed SPR_VR_RESV value	julius	5201d 15h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
233	New softfloat FPU and testfloat sw for or1ksim	julius	5205d 05h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
226	Orksim floating point support additions, spr-defs.h updates, newlib cache init routines updated	julius	5208d 10h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
224	Add new library functions and modify existing ones. Change the parameter type enumarations to upper case. New (simplified and corrected) config file parsing. No include files or default sim.cfg.	jeremybennett	5208d 18h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5309d 10h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h
19	Initial commit of Or1ksim 0.3.0 into the new repository	jeremybennett	5639d 19h	/openrisc/trunk/or1ksim/cpu/or1k/spr-defs.h