URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] [Makefile.in] - Rev 98

Rev	Log message	Author	Age	Path
98	Comprehensive testing of the library JTAG interface. Updates to the documentation to warn of issues in using the memory controller.	jeremybennett	5303d 15h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
97	Updates to test the new JTAG library interface (not yet complete).	jeremybennett	5317d 21h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
96	Various changes which had not been picked up in earlier commits.	jeremybennett	5318d 22h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
91	Tidy up of some obsolete configuration code.	jeremybennett	5331d 12h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
90	Reorganized to allow tests with both native code (for the library) and OpenRISC code (which requires the target tool chain).	jeremybennett	5331d 13h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
82	Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check". Incorporate Mark Jarvis's fixes for Mac OS X.	jeremybennett	5332d 12h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in
80	Add missing configuration files to SVN.	jeremybennett	5332d 15h	/openrisc/trunk/or1ksim/cpu/or32/Makefile.in