OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Rev 123

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
123 Implementation of l.mfspr and l.mtspr corrected to use bitwise OR rather than addition. Associated tests added. jeremybennett 5277d 05h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
122 Added l.ror and l.rori with associated tests. jeremybennett 5278d 01h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
121 Adds exception handling to l.jalr and l.jr. Adds appropriate tests. jeremybennett 5278d 02h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
118 New tests of multiply. Improved tests of exception handling for addition and division. Improvements to instruction testing library. jeremybennett 5278d 23h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
116 Updated to fix l.maci and add tests for l.mac, l.maci, l.macrc and l.msb. Fixed bugs in the old Or1ksim mul test at the same time. jeremybennett 5281d 02h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
115 Added support for l.fl1 and tests for l.ff1 and l.fl1 jeremybennett 5282d 02h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
114 l.addic added. Tests of l.add, l.addc, l.addi and l.addic completed. All set overflow correctly, triggering a range exception if the OVE bit is set in the SR. jeremybennett 5282d 03h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
112 Tidy ups to Ethernet test fixes. new tests for l.add. Fixes so l.add computes overflow correctly, and generates a range exception if the the OVE bit is set in the supervision register. jeremybennett 5283d 02h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
107 New instruction set testing infrastructure. Fix for l.div/li.divu (Bug 1770) and tests for that bug. jeremybennett 5286d 02h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
104 Candidate release 0.4.0rc4 jeremybennett 5289d 10h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
100 Single precision FPU stuff for or1ksim julius 5298d 06h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
82 Major restructuring of the testbench, now named testsuite to bring it into the main package with its own configuration. Uses DejaGNU and builds using a standard top level "make check".

Incorporate Mark Jarvis's fixes for Mac OS X.		 jeremybennett 5333d 02h /openrisc/trunk/or1ksim/cpu/or32/insnset.c
19 Initial commit of Or1ksim 0.3.0 into the new repository jeremybennett 5663d 11h /openrisc/trunk/or1ksim/cpu/or32/insnset.c

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.