OpenCores
URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [or1ksim/] [doc/] [or1ksim.info] - Rev 679

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
625 Fixed configuration to work with GCC 4.6, added -Werror to avoid GCC 4.6 warning as a temporary fix. Added pic.cfg to EXTRA_DIST. Made tests build with SILENT_RULES if available. jeremybennett 4840d 20h /openrisc/trunk/or1ksim/doc/or1ksim.info
556 or1ksim - added performance counters unit and test for it. julius 4910d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
552 or1ksim - cpu/ cleanup - remove dynamic execution model WIP, and dlx, or16 targets julius 4911d 21h /openrisc/trunk/or1ksim/doc/or1ksim.info
538 or1ksim updates. spr-def.h updates, Cygwin compile error fixes. julius 4938d 17h /openrisc/trunk/or1ksim/doc/or1ksim.info
510 Updates for release 0.5.1rc1. jeremybennett 4969d 21h /openrisc/trunk/or1ksim/doc/or1ksim.info
508 Updates for Or1ksim 0.5.0rc3. jeremybennett 4970d 20h /openrisc/trunk/or1ksim/doc/or1ksim.info
483 Updated with new opcodes to generate random numbers and to identify us as Or1ksim. jeremybennett 5035d 22h /openrisc/trunk/or1ksim/doc/or1ksim.info
472 Various changes which improve the quality of the tracing. jeremybennett 5054d 23h /openrisc/trunk/or1ksim/doc/or1ksim.info
460 Merged in changes from Jeremy to Ethernet, updated documentation of tests, added l.nop 8 and l.nop 9 opcodes to turn tracing on and off. Updated documentation to cover l.nop opcodes. jeremybennett 5062d 21h /openrisc/trunk/or1ksim/doc/or1ksim.info
451 More tidying up. jeremybennett 5083d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
450 Simplified (and hopefully more reliable) Ethernet MAC/PHY. jeremybennett 5083d 16h /openrisc/trunk/or1ksim/doc/or1ksim.info
442 OR1Ksim - adding trace controlability by SIGUSR1 signal. julius 5089d 10h /openrisc/trunk/or1ksim/doc/or1ksim.info
440 Updated documentation to describe new Ethernet usage. jeremybennett 5090d 12h /openrisc/trunk/or1ksim/doc/or1ksim.info
436 Or1ksim ethernet TAP updates. Ethernet test still failing. julius 5099d 07h /openrisc/trunk/or1ksim/doc/or1ksim.info
434 Work in progress with new Ethernet TUN/TAP interface. jeremybennett 5102d 13h /openrisc/trunk/or1ksim/doc/or1ksim.info
432 Updates to handle interrupts correctly. jeremybennett 5103d 16h /openrisc/trunk/or1ksim/doc/or1ksim.info
430 or1ksim - clarifying interrupt behavior in code and documentation. julius 5106d 13h /openrisc/trunk/or1ksim/doc/or1ksim.info
429 or1ksim update - remove debug printfs from eth MDIO emulation function
and fix illegal instruction vector jump for invalid instructions.		 julius 5106d 16h /openrisc/trunk/or1ksim/doc/or1ksim.info
420 New feature to trace instructions (option --trace). Manual updated to match. jeremybennett 5117d 17h /openrisc/trunk/or1ksim/doc/or1ksim.info
418 Or1ksim - adding new option when configuring memories, "exitnops" julius 5117d 20h /openrisc/trunk/or1ksim/doc/or1ksim.info

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.